SNES Assembly Information
Complete technical documentation for SNES assembly programming
Branch Information
1.0 (v1) • Updated 9/16/2025, 10:36:59 AM
Addressing Modes
CPU addressing modes define how operands are specified and accessed in instructions.
Stack
Size: 1 byte
Shorthand: stk
Implied
Size: 1 byte
Shorthand: imp
Absolute
Size: 3 bytes
Shorthand: abs
Format: ${0:X4}
Pattern: ^\$([A-Fa-f0-9]{4}|&[A-Za-z0-9-+_]+)$
BlockMove
Size: 3 bytes
Shorthand: src_dest
Format: #${0:X2}, #${1:X2}
Pattern: ^#\$([A-Fa-f0-9]{2}|\^[A-Za-z0-9-+_]+),\s?#\$([A-Fa-f0-9]{2}|\^[A-Za-z0-9-+_]+)$
Immediate
Size: 2 bytes
Shorthand: imm
Format: #${0:X2}
Pattern: ^#(\$[A-Fa-f0-9]{2,4}|\$?[&^*][A-Za-z0-9-+_]+)$
DirectPage
Size: 2 bytes
Shorthand: dp
Format: ${0:X2}
Pattern: ^\$([A-Fa-f0-9]{2})$
PCRelative
Size: 2 bytes
Shorthand: rel
Format: {0}
Pattern: ^([A-Za-z_][A-Za-z0-9_]*|\$[A-Fa-f0-9]{2})$
Accumulator
Size: 1 byte
Shorthand: acc
AbsoluteLong
Size: 4 bytes
Shorthand: long
Format: ${0:X6}
Pattern: ^\$([A-Fa-f0-9]{6}|\@[A-Za-z0-9-+_]+)$
StackRelative
Size: 2 bytes
Shorthand: stkr
Format: ${0:X2}, S
Pattern: ^\$([A-Fa-f0-9]{2}),\s?[Ss]$
PCRelativeLong
Size: 3 bytes
Shorthand: rel16
Format: {0}
Pattern: ^([A-Za-z_][A-Za-z0-9_]*|\$[A-Fa-f0-9]{4})$
StackInterrupt
Size: 2 bytes
Shorthand: stk_int
Format: #${0:X2}
Pattern: ^#\$([A-Fa-f0-9]{2})$
AbsoluteIndexedX
Size: 3 bytes
Shorthand: abs_x
Format: ${0:X4}, X
Pattern: ^(\$[A-Fa-f0-9]{4}|\$?&[A-Za-z0-9-+_]+),\s?[Xx]$
AbsoluteIndexedY
Size: 3 bytes
Shorthand: abs_y
Format: ${0:X4}, Y
Pattern: ^(\$[A-Fa-f0-9]{4}|\$?&[A-Za-z0-9-+_]+),\s?[Yy]$
AbsoluteIndirect
Size: 3 bytes
Shorthand: abs_ind
Format: (${0})
Pattern: ^\((\$[A-Fa-f0-9]{4}|\$?&[A-Za-z0-9-+_]+)\)$
DirectPageIndexedX
Size: 2 bytes
Shorthand: dp_x
Format: ${0:X2}, X
Pattern: ^\$([A-Fa-f0-9]{2}),\s?[Xx]$
DirectPageIndexedY
Size: 2 bytes
Shorthand: dp_y
Format: ${0:X2}, Y
Pattern: ^\$([A-Fa-f0-9]{2}),\s?[Yy]$
DirectPageIndirect
Size: 2 bytes
Shorthand: dp_ind
Format: (${0:X2})
Pattern: ^\(\$([A-Fa-f0-9]{2})\)$
AbsoluteIndirectLong
Size: 3 bytes
Shorthand: abs_indl
Format: [${0}]
Pattern: ^\[(\$[A-Fa-f0-9]{4}|\$?&[A-Za-z0-9-+_]+)\]$
AbsoluteLongIndexedX
Size: 4 bytes
Shorthand: long_x
Format: ${0:X6}, X
Pattern: ^(\$[A-Fa-f0-9]{6}|\$?@[A-Za-z0-9-+_]+),\s?[Xx]$
DirectPageIndirectLong
Size: 2 bytes
Shorthand: dp_indl
Format: [${0:X2}]
Pattern: ^\[\$([A-Fa-f0-9]{2})\]$
AbsoluteIndexedIndirect
Size: 3 bytes
Shorthand: abs_x_ind
Format: (${0}, X)
Pattern: ^\((\$[A-Fa-f0-9]{4}|\$?&[A-Za-z0-9-+_]+),\s*[Xx]\)$
DirectPageIndexedIndirectX
Size: 2 bytes
Shorthand: dp_x_ind
Format: (${0:X2}, X)
Pattern: ^\(\$([A-Fa-f0-9]{2}),\s?[Xx]\)$
DirectPageIndirectIndexedY
Size: 2 bytes
Shorthand: dp_ind_y
Format: (${0:X2}), Y
Pattern: ^\(\$([A-Fa-f0-9]{2})\),\s?[Yy]$
StackRelativeIndirectIndexedY
Size: 2 bytes
Shorthand: stkr_ind_y
Format: (${0:X2}, S), Y
Pattern: ^\(\$([A-Fa-f0-9]{2}),\s?[Ss]\),\s?[Yy]$
DirectPageIndirectLongIndexedY
Size: 2 bytes
Shorthand: dp_indl_y
Format: [${0:X2}], Y
Pattern: ^\[\$([A-Fa-f0-9]{2})\],\s?[Yy]$
Instruction Set
Complete instruction set with opcodes for each addressing mode combination.
ADC
Absolute$6D
Immediate$69
DirectPage$65
AbsoluteLong$6F
StackRelative$63
AbsoluteIndexedX$7D
AbsoluteIndexedY$79
DirectPageIndexedX$75
DirectPageIndirect$72
AbsoluteLongIndexedX$7F
DirectPageIndirectLong$67
DirectPageIndexedIndirectX$61
DirectPageIndirectIndexedY$71
StackRelativeIndirectIndexedY$73
DirectPageIndirectLongIndexedY$77
AND
Absolute$2D
Immediate$29
DirectPage$25
AbsoluteLong$2F
StackRelative$23
AbsoluteIndexedX$3D
AbsoluteIndexedY$39
DirectPageIndexedX$35
DirectPageIndirect$32
AbsoluteLongIndexedX$3F
DirectPageIndirectLong$27
DirectPageIndexedIndirectX$21
DirectPageIndirectIndexedY$31
StackRelativeIndirectIndexedY$33
DirectPageIndirectLongIndexedY$37
ASL
Absolute$0E
DirectPage$06
Accumulator$0A
AbsoluteIndexedX$1E
DirectPageIndexedX$16
BCC
PCRelative$90
BCS
PCRelative$B0
BEQ
PCRelative$F0
BIT
Absolute$2C
Immediate$89
DirectPage$24
AbsoluteIndexedX$3C
DirectPageIndexedX$34
BMI
PCRelative$30
BNE
PCRelative$D0
BPL
PCRelative$10
BRA
PCRelative$80
BRK
StackInterrupt$00
BRL
PCRelativeLong$82
BVC
PCRelative$50
BVS
PCRelative$70
CLC
Implied$18
CLD
Implied$D8
CLI
Implied$58
CLV
Implied$B8
CMP
Absolute$CD
Immediate$C9
DirectPage$C5
AbsoluteLong$CF
StackRelative$C3
AbsoluteIndexedX$DD
AbsoluteIndexedY$D9
DirectPageIndexedX$D5
DirectPageIndirect$D2
AbsoluteLongIndexedX$DF
DirectPageIndirectLong$C7
DirectPageIndexedIndirectX$C1
DirectPageIndirectIndexedY$D1
StackRelativeIndirectIndexedY$D3
DirectPageIndirectLongIndexedY$D7
COP
StackInterrupt$02
CPX
Absolute$EC
Immediate$E0
DirectPage$E4
CPY
Absolute$CC
Immediate$C0
DirectPage$C4
DEC
Absolute$CE
DirectPage$C6
Accumulator$3A
AbsoluteIndexedX$DE
DirectPageIndexedX$D6
DEX
Implied$CA
DEY
Implied$88
EOR
Absolute$4D
Immediate$49
DirectPage$45
AbsoluteLong$4F
StackRelative$43
AbsoluteIndexedX$5D
AbsoluteIndexedY$59
DirectPageIndexedX$55
DirectPageIndirect$52
AbsoluteLongIndexedX$5F
DirectPageIndirectLong$47
DirectPageIndexedIndirectX$41
DirectPageIndirectIndexedY$51
StackRelativeIndirectIndexedY$53
DirectPageIndirectLongIndexedY$57
INC
Absolute$EE
DirectPage$E6
Accumulator$1A
AbsoluteIndexedX$FE
DirectPageIndexedX$F6
INX
Implied$E8
INY
Implied$C8
JML
AbsoluteLong$5C
AbsoluteIndirectLong$DC
JMP
Absolute$4C
AbsoluteIndirect$6C
AbsoluteIndexedIndirect$7C
JSL
AbsoluteLong$22
JSR
Absolute$20
AbsoluteIndexedIndirect$FC
LDA
Absolute$AD
Immediate$A9
DirectPage$A5
AbsoluteLong$AF
StackRelative$A3
AbsoluteIndexedX$BD
AbsoluteIndexedY$B9
DirectPageIndexedX$B5
DirectPageIndirect$B2
AbsoluteLongIndexedX$BF
DirectPageIndirectLong$A7
DirectPageIndexedIndirectX$A1
DirectPageIndirectIndexedY$B1
StackRelativeIndirectIndexedY$B3
DirectPageIndirectLongIndexedY$B7
LDX
Absolute$AE
Immediate$A2
DirectPage$A6
AbsoluteIndexedY$BE
DirectPageIndexedY$B6
LDY
Absolute$AC
Immediate$A0
DirectPage$A4
AbsoluteIndexedX$BC
DirectPageIndexedX$B4
LSR
Absolute$4E
DirectPage$46
Accumulator$4A
AbsoluteIndexedX$5E
DirectPageIndexedX$56
MVN
BlockMove$54
MVP
BlockMove$44
NOP
Implied$EA
ORA
Absolute$0D
Immediate$09
DirectPage$05
AbsoluteLong$0F
StackRelative$03
AbsoluteIndexedX$1D
AbsoluteIndexedY$19
DirectPageIndexedX$15
DirectPageIndirect$12
AbsoluteLongIndexedX$1F
DirectPageIndirectLong$07
DirectPageIndexedIndirectX$01
DirectPageIndirectIndexedY$11
StackRelativeIndirectIndexedY$13
DirectPageIndirectLongIndexedY$17
PEA
Absolute$F4
PEI
DirectPageIndirect$D4
PER
PCRelativeLong$62
PHA
Stack$48
PHB
Stack$8B
PHD
Stack$0B
PHK
Stack$4B
PHP
Stack$08
PHX
Stack$DA
PHY
Stack$5A
PLA
Stack$68
PLB
Stack$AB
PLD
Stack$2B
PLP
Stack$28
PLX
Stack$FA
PLY
Stack$7A
REP
Immediate$C2
ROL
Absolute$2E
DirectPage$26
Accumulator$2A
AbsoluteIndexedX$3E
DirectPageIndexedX$36
ROR
Absolute$6E
DirectPage$66
Accumulator$6A
AbsoluteIndexedX$7E
DirectPageIndexedX$76
RTI
Stack$40
RTL
Stack$6B
RTS
Stack$60
SBC
Absolute$ED
Immediate$E9
DirectPage$E5
AbsoluteLong$EF
StackRelative$E3
AbsoluteIndexedX$FD
AbsoluteIndexedY$F9
DirectPageIndexedX$F5
DirectPageIndirect$F2
AbsoluteLongIndexedX$FF
DirectPageIndirectLong$E7
DirectPageIndexedIndirectX$E1
DirectPageIndirectIndexedY$F1
StackRelativeIndirectIndexedY$F3
DirectPageIndirectLongIndexedY$F7
SEC
Implied$38
SED
Implied$F8
SEI
Implied$78
SEP
Immediate$E2
STA
Absolute$8D
DirectPage$85
AbsoluteLong$8F
StackRelative$83
AbsoluteIndexedX$9D
AbsoluteIndexedY$99
DirectPageIndexedX$95
DirectPageIndirect$92
AbsoluteLongIndexedX$9F
DirectPageIndirectLong$87
DirectPageIndexedIndirectX$81
DirectPageIndirectIndexedY$91
StackRelativeIndirectIndexedY$93
DirectPageIndirectLongIndexedY$97
STP
Implied$DB
STX
Absolute$8E
DirectPage$86
DirectPageIndexedY$96
STY
Absolute$8C
DirectPage$84
DirectPageIndexedX$94
STZ
Absolute$9C
DirectPage$64
AbsoluteIndexedX$9E
DirectPageIndexedX$74
TAX
Implied$AA
TAY
Implied$A8
TCD
Implied$5B
TCS
Implied$1B
TDC
Implied$7B
TRB
Absolute$1C
DirectPage$14
TSB
Absolute$0C
DirectPage$04
TSC
Implied$3B
TSX
Implied$BA
TXA
Implied$8A
TXS
Implied$9A
TXY
Implied$9B
TYA
Implied$98
TYX
Implied$BB
WAI
Implied$CB
WDM
Implied$42
XBA
Implied$EB
XCE
Implied$FB
Interrupt Vectors
No interrupt vectors defined for this platform branch.